A hypothetical machine of Figure 3.4 as described in our lecture has two I/O instructions: 1101 (binary) 0011 (binary) Load AC from I/O Store AC to I/O In these cases, the 12bit address identifies a particular I/O device. Show the program execution for the following program (using the format of Figure 3.5 of the textbook as shown below) with clear explanation. 1. Load AC from device 15 (assume that the next balue retrieved from device 15 is 13) 2. Add contents of memory location 0x480. (assume that the content at location 0x480 is 24) 3. Store AC to device 48 Note: all numbers above should be treated as decimal number unless otherwise stated. Hexadecimal number has Ox as prefix, and the binary has a (binary) label after the number. 0 34 Opcode Address (a) Instruction format Magnitude (b) Integer format Program counter (PC) = Address of instruction Instruction register (IR) = Instruction being executed Accumulator (AC) = Temporary storage 0001 Load AC from memory 0010 Store AC to memory 0101 Add to AC from memory (c) Internal CPU registers 15 15 (d) Partial list of opcodes Figure 3.4 Characteristics of a Hypothetical Machine Memory 300 PC 300 1940 CPU registers 3 0 1 PC Memory 300 19 4 0 CPU registers 301 5 9 4 1 AC 302 29 4 1 19 4 0 IR 302 301 5941 29 4 1 . • 940 0 0 0 3 940 0 0 0 3 941 0 0 0 2 941 000 2 Step 1 300 Memory 1940 301 594 1 302 29 4 1 • 940 000 3 941 0 0 0 2 Step 3 Memory CPU registers 301 PC 0003 AC 5 9 4 1 IR Step 2 300 19 4 0 301 5 9 4 1 302 29 4 1 940 000 3 941 0 0 0 2 Step 5 CPU registers 3 0 2 PC 0005 AC 2 9 4 1 IR 0 0 0 3 AC 1940 IR Memory 300 194 0 301 594 1 302 29 4 1 CPU registers 3 0 2 PC 0 0 0 5 AC 5941 \IR CE 941 940 0 0 0 3 000 2 3+2 5- Step 4 Memory 300 19 4 0 301 594 1 302 29 4 1 CPU registers 30 3 PC 0 0 0 5 AC 29 4 1 IR 940 0 0 0 3 941 0 0 0 5 Step 6