Design a digital circuit that will count the number of votes from 3 voters. Think of each voter as responding to question and voting YES (1) or NO (0). The output of the circuit will be a 2-bit binary number V = [V1 V0], having a value equal to the number of YES votes as given in the following table: No. of YES votes 0 1 2 3 V1 0 V0 0 0 1 1 0 1 1 a) Use SUM OF PRODUCT design technique to write logic equations for VI and V0. b) Use K-maps to reduce the logic equations to the minimum number of product terms. c) Draw a logic diagram for your design. d) Write Verilog code to implement your design on the FPGA board. Use three out of the seven switches to represent the voters and LD0 and LD1 LED's for V0 and V1. Keep in mind that if any one says YES then the output is 1 and any combination of two voters should show 2 and so on.