Sn-1 S₁ 5.2 Parallel Fast Adders 149 S₁ So FA-1 FA, FA₁ FA0 Cn-1 Cn-2 C₁ C₁-1 C₁ Co C_1 T An-1 Bn-1 A₁ B₁ A₁ B₁ A Bo Figure 5.2 Block diagram of an n-bit ripple-carry adder It can be seen from Expression (5.1) that the carry of the full adder of the current bit i, C, depends on the carry of the lower-order bit i - 1, C Although n full adders work in parallel, the carry signals are, in fact, generated and propagated in sequence. The worst case of carry propagation occurs when to C all the way along the carry propaga- AB (a) C-1 AB (b) C-11 A₁ 3.4 Design of Combinational Logic Circuits S C D-S D-D-C (c) B₁ C-1 A₁ D (d) B₁- D C-1 Doc 73 S₁ Doc Figure 3.11 Four implementations of a full adder: (a) XOR-based circuit, (b) XNOR- based circuit, (c) all-NAND circuit, and (d) all-NOR circuit 152 COMPUTER ORGANIZATION: PRIN X3 G P Y2 C2 داد X₁ Co C-1 Figure 5.4 Logic diagram of a 4-bit carry look-ahead circuit