Exercise 3: The design team for a simple, single-issue processor is choosing between a pipelined or non-pipelined implementation. Here are some design parameters for the two possibilities Parameter Pipelined Version Clock Rate 500 MHz CPI for ALU instructions 1 CPI for Control 2 CPI for Memory instructions 2.7 Non-Pipelined Version 350 MHz 1 1 a) For a program with 20% ALU instructions, 10% control instructions and 70% memory instructions. Give a quantitative CPI average for each case, which design will be faster? b) For a program with 80% ALU instructions, 10% control instructions and 10% memory instructions. Give a quantitative CPI average for each case, which design will be faster? Question 1 (20 pts) Consider the following register set connected to a common ALU and having the following opcode table: RI R2 13 RA R R6 13 SELA MUX MUN 3x8 Decoder OPRA ALU SELD - OPR Operation 00000 Transfer A 00001 Increment 4 00010 Add A+B 00101 Subtract A-B 00110 Decrement A 01000 AND A and B 01010 OR A and B 01100 XORA and B 01110 Complement A 10000 Shift right A 11000 Shift left A Figure 1 Register set with common ALU Complete the following table: Instruction SLE A SEL B SEL D OPR R1 R3-R2 R1 R1-1 R3 shr R7 R8 R8+5 010 111 111 00000 010 010 010 01100 (20 ntc)