(b) [15] <A.7> Assume that the given code sequence is from a small, embedded computer application, such as a microwave oven controller, that uses a 16-bit memory address and data operands. If a load-store architecture is used, assume it has 16 general-purpose registers. For each architecture answer the following questions: How many instruction bytes are fetched? How many bytes of data are transferred from/to memory? Which architecture is most efficient as measured by total memory traffic (code + data)? (c) [20] <A.7> Now assume a processor with 64-bit memory addresses and data operands. For each architecture answer the questions of part (c). How have the relative merits of the architectures changed for the chosen metrics? 2 1 NG Q A N Q 3 4 W E S 215 R T 4 6 Y > ON • O . 7 8 9 0 O D F G H J X C H τ ion command < 1 K O 4 P t 3 1 L B N M V- < A. > ? H P command option