Student Name (Write on every page): [2] Implement F (X, Y, Z) = Σ (1, 2, 3, 4, 5, 7) in its simplest form using NAND gates only. (a) Use K-map to come up with the reduced standard form as sum of products for F and F. (b) Decide which implementation is cheaper in terms of total number of gates needed and derive the NAND gate implementation for this function. (c) Implement the function using a Decoder of your choice and any necessary gates. (d) Implement the function using a Multiplexer of your choice (For extra credit, try to use a multiplexer with 2 select inputs only). Show all your work.