How many MOSFET is needed to implement the following function with a single CMOS gate (Z=A+BCD): Select one: a. 12 b. 10 c. 6 d. 8 Determine how many minimum Configurable logic block (CLB) you would need for 3-bit subtractor register to be implemented in the FPGA. if you know that the CLB structure is shown in Fig. bellow: Look-Up Table MUX D (LUT) Select one: ○ a. 8 b. 4. O c. 3 O d. 2 O e. 6 Assume you have a clock signal with 100 MHz and you need 12500 KHz then how many T-flip flops you would for the frequency divider? Select one: O a. 2 O b. 5 ○ c. 3 O d. 4 O e. 1 Transfer the following numbers to binary first then find the result of the following arithmetic in binary: (34) 8 × (15) 10 Answer: