Transistor Model for Manual Analysis VTO (V) NMOS PMOS 0.43 -0.4 Y (V12) 0.4 K' (A/V²) 2. (V-) 115 x 106 0.06 -0.4 -30 x 106 -0.1 Q1. Figure shown below shows an NMOS inverter with resistive load. a. Qualitatively discuss why this circuit behaves as an inverter. b. Find Voн and VOL calculate VIH and VIL. c. Find NML and NMH, and plot the VTC using HSPICE. d. Compute the average power dissipation for: (i) Vin= 0 V and (ii) Vin=2.5 V +2.5 V R₂-75kQ MI W/L-1.5/0.5 e. Use HSPICE to sketch the VTCS for R₁ = 37k, 75k, and 150k on a single graph. f. Comment on the relationship between the critical VTC voltages (i.e., VOL, VOH, VIL, VIH) and the load resistance, RL. g. Do high or low impedance loads seem to produce more ideal inverter characteristics? Q2. For the inverter shown in the figure above and an output load of 3 pF a. Calculate tplh, 1phl, and tp. b. Are the rising and falling delays equal? Why or why not?