3.0 Design 1 You will design and verify the "farmer's problem" describe below using Verilog. You will use the product-of-sums (POS) expression. You will run a structural and a behavioral description of the same problem. The goals of this lab session are: о To learn use of Schematic Capture using POS expression. To learn use of Verilog Structural description. ○ To learn use of Verilog Behavioral description. For each design simulation, you have to show your simulation results and your code and/or schematic to the lab instructor to obtain his/her initials on your answer sheet. Description: A farmer owns two barns; one north of a creek and the other south. The farmer has a Cabbage, a Goat, and a Wolf. The Farmer needs to put each item in a barn every night. If the Cabbage and the Goat are in the same barn, the Goat will eat the Cabbage. If the Wolf and the Goat are in the same barn, the Wolf will eat the Goat. The Farmer is worried and you have to design an alarm circuit that will let him know if two items can safely be placed in a barn. For this circuit, you have three inputs = {Cabbage, Goat, Wolf} and one output = {Alarm}. If an input is in the north barn, it gets assigned logic 1, and if it is in the south barn it gets assigned logic 0. The output Alarm, asserts if there are two items in a barn that should not be kept together. 4.0 Design 2 (Lab3step3) This time we will make the farmer's problem more complex by adding the farmer himself to the bunch. That way his presence will keep the wolf from eating the goat and the goat from eating the cabbage. • Write a canonical SOP expression, and then simplify it. • • • Create a new project named lab3step3.qpf, and save your file under \CPRE281\Lab03\lab3step3. Use Verilog to create a digital circuit for the alarm. You can choose either the structural or the behavioral description (HINT: use the one that uses fewer lines of code). Use the DE2-115 board to verify your circuit operates properly. Show your results to the lab instructor. PRELAB: Q1. Read section 3.0 and fill in the truth table below for Design 1 (the farmer's problem). Then use it to construct the POS expression. Cabbage Goat Wolf 0 0 0 0 1 1 1 1 0 0 0 1 1 0 1 1 1 POS Logic Expression: Alarm Q2. Read section 4.0 and fill in the truth table below for Design 2 (adding the farmer). Then use it to construct the SOP expressions. Farmer Cabbage Goat Wolf Alarm 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 1 0 0 1 0 1 OO 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 Canonical SOP Logic Expression: Simplified SOP Logic Expression: